Complex multiplier for binary two's complement numbers

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364757, G06F 752

Patent

active

046807276

ABSTRACT:
A method and apparatus for multiplying two digital pairings representing complex numbers is described. The method includes preloading a memory with contents based on the second complex combination and the basis vector, and repeatedly addressing the memory based on the first complex combination taken L bits at a time in order to accumulate a complex product combination. The complex multiplication apparatus is preferably constructed as high speed circuitry on a gallium arsenide integrated circuit chip.

REFERENCES:
patent: 3926367 (1975-12-01), Bond et al.
patent: 4275452 (1981-06-01), White
patent: 4344151 (1982-08-01), White
patent: 4354249 (1982-10-01), King et al.

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