Facsimile and static presentation processing – Facsimile – Specific signal processing circuitry
Patent
1985-07-31
1987-07-14
Chin, Tommy P.
Facsimile and static presentation processing
Facsimile
Specific signal processing circuitry
358 11, 358134, 358140, H04N 701
Patent
active
046806326
ABSTRACT:
A speed-up memory doubles the field rate of a video input signal by repeating each field to reduce flicker when the double field rate signal is displayed. Read/write clocks for controlling the memory are locked to the color subcarrier of the video input signal thereby tending to produce visual artifacts in the displayed image due to clock skew relative to sync when non-standard video signals are processed. The skew errors are corrected by circuitry which measures the skew of the read and write clocks and delays the video signal as a function of a difference between the clock skew measurements.
REFERENCES:
patent: 4249198 (1981-02-01), Ito et al.
patent: 4322750 (1982-03-01), Lord et al.
patent: 4443821 (1984-04-01), Kato
patent: 4573080 (1986-02-01), Maze
patent: 4593315 (1986-06-01), Willis
patent: 4595953 (1986-06-01), Willis
patent: 4623913 (1986-11-01), Fling
patent: 4630098 (1986-12-01), Fling
patent: 4639763 (1987-01-01), Willis
Data Book "Digit 2000 NTSC Double Scan VLSI Digital TV System", published by ITT Intermetall. Edition 1985/5, pp. 41-72.
Christopher Todd J.
Fling Russell T.
Willis Donald H.
Chin Tommy P.
Coalter R. G.
Emanuel P. M.
Rasmussen P. J.
RCA Corporation
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