Method and device for detecting and correcting errors in memory

Details Method and device for detecting and correcting errors in memory Method and device for detecting and correcting errors in memory

1994-08-26

1996-03-05

Baker, Stephen M.

Excavating

G11C 2900, G06F 1110

Patent

active

054973767

ABSTRACT:
Single error correction in digital memory modules is simply accomplished at any time by dividing the memory module into segments, writing data into the memory module, testing the memory module after a period of time and, on the occurrence of a single error, data correction is entered. This process is repeated until no single error is found. Such single error correction is fast a single error correction is possible without the need for external memory.

REFERENCES:
patent: 4493075 (1985-01-01), Anderson et al.
patent: 4584681 (1986-04-01), Singh et al.
patent: 4608687 (1986-08-01), Dutton
patent: 4627093 (1986-12-01), Hashimoto et al.
patent: 4654847 (1987-03-01), Dutton
patent: 4939694 (1990-07-01), Eaton et al.
patent: 5199033 (1993-03-01), McGeoch et al.
patent: 5200959 (1993-04-01), Gross et al.
patent: 5263032 (1993-11-01), Porter et al.
patent: 5267242 (1993-11-01), Lavallee et al.
patent: 5278839 (1994-01-01), Matsumoto et al.
patent: 5357473 (1994-10-01), Mizuno et al.
patent: 5359569 (1994-10-01), Fujita et al.
patent: 5359570 (1994-10-01), Hsu et al.
"Built-in Testable Error Detection and Correction", M. Katoozi et al, IEEE Journal of Solid State Circuits, vol. 27, No. 1, Jan. 1992, pp. 59-66.
"Mikrocomputer in der Sicherheitstechnik", H. Holscher et al, Verlag TUV Rheinland, 1984, pp. 51-52.
"A Reconfigurable Wafer-Scale Memory", A. Boubekeur et al, IEEE Journal of Solid-State Circuits, vol. 26, No. 10, Oct. 1991, pp. 1423-1432.
"Mechanism to Test Main Storage and Assign the Hardware System Area and the Operating System Nucleus to Failure Free Storage", A. Sutton et al, IBM Technical Disclosure Bulletin, vol. 22, No. 12, May 1980, p. 5415.

Affiliated with

Also associated with

Rating

Method and device for detecting and correcting errors in memory does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and device for detecting and correcting errors in memory , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and device for detecting and correcting errors in memory will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1417219