Three-dimensional multichip module systems

Details Three-dimensional multichip module systems Three-dimensional multichip module systems

1991-03-27

1992-05-05

Epps, Georgia

357 74, 357 71, 357 80, 357 65, 357 55, 357 72, H01L 2316, H01L 2302

Patent

active

051112787

ABSTRACT:
Multichip integrated circuit packages and methods of fabrication, along with systems for stacking such packages, are disclosed. In one embodiment, the multichip package has an array of contact pads on an upper surface thereof and an array of contact pads on a lower surface thereof. Connection means are provided for electrically coupling at least some of the contact pads on each package surface with selected ones of the contact pads on the other surface, or selected interconnection metallization which is disposed between integrated circuits located within the package. The contact pads of each surface array are preferably equal in number and vertically aligned such that multiple multichip packages may be readily stacked, with a conductive means disposed therebetween for electrically coupling the contact pads of one package to the pads of another package. In addition, various internal and external heat sink structures are provided which facilitate dissipation of heat in a multichip package or in a stack of multichip packages. Specific processing methods for each of the various multichip modules and stack systems disclosed are described herein.

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