Patent
1989-11-22
1992-05-05
James, Andrew J.
357 235, 357 54, 357 49, H01L 2978
Patent
active
051112620
ABSTRACT:
A structure used to protect a dielectric is disclosed wherein a transistor located nearby the dielectric is connected in series with a conductor overlying the fragile dielectric such that the transistor gate will accumulate charge along with the conductive material over the fragile dielectric. After fabrication and during normal circuit operation, this transistor device remians in an off state, isolating the fragile dielectric node from other circuitry. In an alternate embodiment the protection transistor is a floating gate depletion device, which would always be on until the circuit is activated. At the time the circuit is activated, the device is turned off by trapping electrons on the gate by avalanching a junction associated with it. In a preferred embodiment, a buried contact if formed after the conductor overlying the dielectric, usually polysilicon, is formed. This buried contact connects the conductor to the discharging transistor. Alternatively, a weak portion in the dielectric may be deliberately created by placing a lightly doped N-type diffusion in the area under which the buried contact is desired.
REFERENCES:
patent: 4786956 (1988-11-01), Paar
patent: 4821096 (1989-04-01), Maloney
patent: 4893157 (1990-01-01), Miyazawa
Chen Shih-Ou
Chiang Steve S.
McCollum John L.
Actel Corporation
D'Alessandro Kenneth
James Andrew J.
Meier Stephen D.
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