Logic design system for creating circuit configuration by genera

Details Logic design system for creating circuit configuration by genera Logic design system for creating circuit configuration by genera

1991-07-24

1992-09-08

Lee, Thomas C.

Boots, shoes, and leggings

364489, 3642212, 3642218, 364DIG1, G06F 1520

Patent

active

051465833

ABSTRACT:
An apparatus and method for translating a function description of a circuit presented in hardware description language includes parsing the function description of the circuit to generate a parse tree. The structure of the parse tree is deformed to optimize the test level redundancy of the function description to thereby generate a deformed parse tree. The deformed parse tree is then translated into function blocks representing a hardware configuration of the circuit set forth by the function description.

REFERENCES:
patent: 4703435 (1987-10-01), Darringer et al.
patent: 4791356 (1988-12-01), Warren et al.
patent: 4803636 (1989-02-01), Nishiyama et al.
patent: 4816999 (1989-03-01), Berman et al.
patent: 4817029 (1989-03-01), Plum et al.

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