Fabrication process of a semiconductor memory device having a mu

Details Fabrication process of a semiconductor memory device having a mu Fabrication process of a semiconductor memory device having a mu

1994-12-14

1996-03-05

Wilczewski, Mary

Fishing, trapping, and vermin destroying

437 47, 437 60, 437919, H01L 2170, H01L 2700

Patent

active

054967589

ABSTRACT:
A method for fabricating a semiconductor memory device includes the steps of forming, in a semiconductor substrate of a first conductivity type, a well of a second opposite conductivity type by protecting the substrate surface except for a part where the well of the second conductivity type is to be formed, oxidizing the exposed surface of the semiconductor substrate while using the same mask pattern to form a thick oxide film on the surface of the well, and removing the thick oxide film by an etching process to form a recessed surface on the well.

REFERENCES:
patent: 4696092 (1987-09-01), Doering et al.
patent: 4882289 (1989-11-01), Moriuchi et al.
patent: 5286666 (1994-02-01), Katto et al.
Yoshikawa et al., Dig. Tech. Papers, Symp. VLSI Technology, 1989, pp. 67-68 "Process Technologies for a High Speed 16 MDRAM with Trench Type Cell".
Sagara et al., Dig. Tech. Papers, Symp. VLSI Technology, 1992, pp. 10-11 "A 0.72 um.sup.2 Recessed STC (RSTC) Technology for 256 MBit DRAMs Using Quarter-Micron Phase Shift Lithography".

Affiliated with

Also associated with

Rating

Fabrication process of a semiconductor memory device having a mu does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Fabrication process of a semiconductor memory device having a mu, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Fabrication process of a semiconductor memory device having a mu will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1412708