Method for preventing bit line-to-bit line leakage in the access

Details Method for preventing bit line-to-bit line leakage in the access Method for preventing bit line-to-bit line leakage in the access

1994-03-15

1996-03-05

Fourson, George

Fishing, trapping, and vermin destroying

437 48, H01L 218247

Patent

active

054967546

ABSTRACT:
The bit lines in an alternate-metal, virtual-ground (AMG) electrically programmable read-only-memory (EPROM), are formed by utilizing a plurality of field oxide regions and a plurality of pairs of dielectric/floating gate strips, which have the ends of each pair of strips connected together over a field oxide region, as an implant mask. By connecting together the ends of each pair of dielectric/floating gate strips, the width of the strips at the edges of the field oxide regions will remain constant. As a result, the isolation between adjacent bit lines, which is defined by the width of the strips, will also remain constant.

REFERENCES:
patent: 5204835 (1993-04-01), Eitan
patent: 5227326 (1993-07-01), Walker
patent: 5246874 (1993-09-01), Bergemont
patent: 5346842 (1994-09-01), Bergemont
patent: 5371030 (1994-12-01), Bergemont

Affiliated with

Also associated with

Rating

Method for preventing bit line-to-bit line leakage in the access does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for preventing bit line-to-bit line leakage in the access, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for preventing bit line-to-bit line leakage in the access will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1412669