Symbol decoding system

Registers – Coded record sensors – Particular sensor structure

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250568, G06K 710

Patent

active

042530180

ABSTRACT:
A symbol decoding system incorporated in a NMOS/LSI chip generates asynchronously binary data in response to the scanning of bars and spaces of the symbol. The binary data may represent each bar or space as a numerical character, a margin or a center band of the symbol. The binary data also includes data identifying the bar or space and if the character generated is valid or invalid. Logic circuits generate a time delay period allowing the binary data to be generated asynchronously during the delay period. At the end of the delay period the binary data is outputted to a utilizing device for selecting the valid data from the data outputted by the decoding system.

REFERENCES:
patent: 3906203 (1975-09-01), Butulis
patent: 4095096 (1978-06-01), Harada et al.
patent: 4125765 (1978-11-01), Cowardin
patent: 4146046 (1979-03-01), Dobras
patent: 4146782 (1979-03-01), Barnich

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