Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including dielectric isolation means
Patent
1994-07-05
1996-04-09
Carroll, J.
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Including dielectric isolation means
257640, 257647, 257649, 437 69, H01L 2900, H01L 2358
Patent
active
055064400
ABSTRACT:
A method is provided for forming an improved poly-buffered LOCOS process by forming a pad oxide layer over a substrate. A first nitride layer is formed over the pad oxide layer and a polysilicon layer is formed over the first nitride layer. A second nitride layer is formed over the polysilicon layer. An opening is etched through the second nitride layer, the polysilicon layer, the first nitride layer and the pad oxide layer to expose a portion of the underlying substrate. A field oxide region is then formed in the opening.
REFERENCES:
patent: 4407696 (1983-10-01), Han et al.
patent: 5130268 (1992-07-01), Liou et al.
patent: 5159428 (1992-10-01), Rao et al.
A. Mozu et al., "A Manufacturing Process for Semiconductor Diodes" Kokai 61-81649 (Japan) Apr. 1986 pp. 1-12.
F. H. De La Moneda, "Process to Reduce and Control the P-type Doping Concentration at the Boundary Between Recessed Oxide and Active Device Regions", IBM Technical Disclosure Bulletin, vol. 25, (Apr. 1983), pp. 6131-6142.
IEEE Electron Device Letters, vol. 11, No. 11, Nov. 1990 "Reverse L-Shape Sealed Poly-Buffer LOCOS Technology", J. M. Sung, et al., pp. 549-551.
Journal of The Electrochemical Society, vol. 138, No. 7, Jul. 1991, "Twin-White Ribbon Effect and Pit Formation Mechanism in PBLOCOS" Tin-hwang Lin, et al, pp. 2145-2149.
J. Electrochem. Soc.: Solid-State Science and Technology, vol. 129, No. 8, Aug. 1982, titled "The Oxidation Inhibition in Nitrogen-Implanted Silicon", by W. J. M. J. Josquin, et al., pp. 1803-1811.
IEDM, 1989, pp. 425-428, titled "A 0.5-micron BiCMOS Technology for Logic and 4Mbit-class SRAM's," by R. Eklund, et al.
Bryant Frank R.
Hodges Robert L.
Wei Che-Chia
Carroll J.
Hill Kenneth C.
Jorgenson Lisa K.
Robinson Richard K.
SGS-Thomson Microelectronics Inc.
LandOfFree
Poly-buffered LOCOS process does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Poly-buffered LOCOS process, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Poly-buffered LOCOS process will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-140845