Method and apparatus for enabling a memory

Details Method and apparatus for enabling a memory Method and apparatus for enabling a memory

1987-08-03

1991-10-29

Fears, Terrell W.

Static information storage and retrieval

Addressing

36518901, G11C 1300

Patent

active

050620800

ABSTRACT:
A method and device for enabling writes to a memory unit. The memory write device, such as a microprocessor (11), must provide a predetermined sequence of addresses to an address decoding unit (13), which then passes along the decoded addresses to a memory write enable unit (14). If the correct sequence, and only the correct sequence, is so provided, the memory write enable unit (14) will provide an enable signal (16) to the memory (12), thereby allowing the microprocessor (11) to write to the memory (12). A timer (26) can be utilized to limit the enable window.

REFERENCES:
patent: 4120048 (1978-10-01), Fuhrman
patent: 4710898 (1987-12-01), Sumi
patent: 4724531 (1988-02-01), Angleton et al.

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