PCI bus to target integrated circuit interconnect mechanism allo

Details PCI bus to target integrated circuit interconnect mechanism allo PCI bus to target integrated circuit interconnect mechanism allo

1996-10-21

1998-06-23

Harvey, Jack B.

395285, 395281, 395527, G06F 1300

Patent

active

057713600

ABSTRACT:
A computer system comprising a first expansion bus which operates according to a first transfer protocol and is adapted to couple to one or more peripheral devices. A central processing unit and a bus bridge are operatively coupled to the first expansion bus. A second bus including a second transfer protocol is coupled to the bus bridge. At least one peripheral device of a first type compatible with the second transfer protocol is coupled to the second bus. At least one peripheral device of a second type coupled to the second bus, wherein the at least one peripheral device of the second type is compatible with a third transfer protocol of a peripheral bus standard, the third transfer protocol of the peripheral bus standard being different from the second transfer protocol of the second bus. The bus bridge is operable to convert signals between the first expansion bus and the second bus, and is operable to implement the second transfer protocol on the second bus. The bus bridge is also operable to implement the third transfer protocol of the peripheral bus standard on the second bus. The bus bridge is configured to communicate with the at least one peripheral device of the first type using the second transfer protocol of the second bus, and is configured to communicate with the at least one peripheral device of the second type using the third transfer protocol of the peripheral bus standard.

REFERENCES:
patent: 5526349 (1996-06-01), Diaz et al.
patent: 5664124 (1997-09-01), Katz et al.
patent: 5682484 (1997-10-01), Lambrecht
PCI Local Bus Multimedia Design Guide, Revision 1.0, Mar. 28, 1994, pp. 1-40.
Peripheral Components, Intel, Jan. 1995, pp. ix, 1-1 through 1-72.

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