Static information storage and retrieval – Addressing – Sync/clocking
Patent
1997-06-26
1998-06-23
Nelms, David C.
Static information storage and retrieval
Addressing
Sync/clocking
3652335, G11C 800
Patent
active
057712018
ABSTRACT:
A synchronous semiconductor device which can distribute a clock signal inputted through an input pad from a top portion, not from a center portion, to bottom, left, and right portions of a chip. The synchronous semiconductor device comprises a frequency dividing section for dividing of an input clock signal, buffer section for distributing a divided clock signal outputted from the frequency dividing section to necessary parts of a chip, and frequency multiplying section, receiving the divided clock signal outputted from the frequency dividing section and the buffer section, for adjusting a pulse width thereof with a frequency identical to that of the input clock signal. The frequency of the clock signal is divided by the frequency dividing section, and the divided clock signal is distributed from a top portion of the chip to left, right, and bottom portions of the chip. Then the divided and distributed clock signal is multiplied by the frequency multiplying section to use the multiplied clock signal as a strobe input signal for registers provided in the device.
REFERENCES:
patent: 5627794 (1997-05-01), Lee
patent: 5694371 (1997-12-01), Kawaguchi
Hyundai Electronics Industries Co,. Ltd.
Mai Son
Nelms David C.
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