Pipelined processor with register renaming hardware to accommoda

Details Pipelined processor with register renaming hardware to accommoda Pipelined processor with register renaming hardware to accommoda

1995-11-20

1997-05-13

Ray, Gopal C.

395800, G06F 930, G06F 1202

Patent

active

056301499

ABSTRACT:
A microprocessor comprises one or more instruction pipelines having a plurality of stages for processing a stream of instructions, wherein one or more of the instructions reference a defined set of logical registers having multiple addressable sizes as sources and destinations of operands for the instruction. A plurality of physical registers are provided in excess of the number of defined set of logical registers. Physical registers are selectively allocated to one of said defined set of logical registers responsive to an instruction for writing to said one of said logical registers and the size associated with the logical register.

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