Non-volatile memory array controller capable of controlling memo

Details Non-volatile memory array controller capable of controlling memo Non-volatile memory array controller capable of controlling memo

1993-12-10

1997-05-13

Chan, Eddie P.

395307, G06F 1204

Patent

active

056300999

ABSTRACT:
A non-volatile memory controller is provided which is connectable directly to the local bus of a computer system and which allows access to one or more 32-bit banks of ROM and to an 8-bit bank of non-volatile memory. The 8-bit bank of non-volatile memory may be used, for example, to store BIOS code, and may be implemented using a ROM or flash memory device. The non-volatile memory controller includes a data router, a sequencer, and a set of output latches for routing the 8-bit BIOS code (stored within the 8-bit bank) to selected byte lanes of the local bus and for converting the 8-bit data to 32-bit local bus data. The non-volatile memory controller further supports high performance, 32-bit accesses to the user software stored within the 32-bit banks. If the system designer or user instead must maximize the memory capacity of the computer system, the 8-bit bank of memory may be replaced with a larger 32-bit bank of memory. In this configuration, a control signal is provided to the non-volatile memory controller to indicate that a 32-bit bank is connected rather than an 8-bit bank. The control signal causes the sequencer and the data router to be disabled. When a memory access to the 32-bit bank is executed, the non-volatile memory controller accesses the data within the 32-bit bank and drives the data directly on the CPU local bus.

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