Run length decoding apparatus

Details Run length decoding apparatus Run length decoding apparatus

1983-01-06

1985-02-12

Martin, John C.

Facsimile and static presentation processing

Facsimile

Recording apparatus

H04N 100

Patent

active

044994982

ABSTRACT:
In a run length decoding apparatus of the type comprising a decoding circuit decoding a series of run length encoded data to sequentially output binary data indicative of respective run lengths, and decoding means for decoding a white or black signal having a number of bits represented by an output value of the decoding circuit so as to sequentially accumulate decoded signals in a picture memory device, there are provided a lower order counter to be set with a surplus less than n (an integer larger than 2) of the output value of the decoding circuit, an upper order counter to be set with an upper order value, count of the upper order counter being decremented according to a clock pulse, a selector which, in response to a carry signal outputted by the upper order counter, selects and outputs either one of a fixed value n and an output signal of the lower order counter at each clock pulse, a flip-flop circuit whose state is reversed at each one run length, and an array conversion circuit inputted with decoded data outputted from the flip-flop circuit and a number of effective data outputted from the selector to sequentially array effective decoded data for outputting them as parallel data each having more than n bits.

REFERENCES:
patent: 4223356 (1980-09-01), Renelt et al.
patent: 4228467 (1980-10-01), de Loye et al.
patent: 4360840 (1982-11-01), Wolfrum et al.

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