Excavating
Patent
1994-12-22
1997-05-13
Nguyen, Hoa T.
Excavating
371 251, 371 215, G01R 3128
Patent
active
056299460
ABSTRACT:
A test pattern generator which is capable of generating a test pattern with high speed without requiring complicated programming is disclosed. The test pattern generator includes a parallel circuit for converting an instruction signal of a serial form to n instruction signals of a parallel form, an instruction processing circuit having n-1 instruction processors for performing arithmetic operations based on two instruction data out of the instruction signals given in the parallel form and a plurality of sets of registers each set of which is commonly provided a lower speed clock signal, an arithmetic circuit for receiving the parallel data from the instruction processing circuit and performing arithmetic operations by n arithmetic units therein and including a register which provides the data in the previous cycle to the other inputs of all of the arithmetic units, a multiplexing circuit for converting the parallel data from the arithmetic circuit to a serial form having n times faster than the parallel data based on a higher speed clock having n times faster speed of the lower speed clock signal.
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Advantest Corporation
Iqbal Nadeem
Nguyen Hoa T.
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