Electric power conversion systems – Current conversion – Including d.c.-a.c.-d.c. converter
Patent
1995-10-20
1997-05-13
Wong, Peter S.
Electric power conversion systems
Current conversion
Including d.c.-a.c.-d.c. converter
363 95, H02M 3335, H02M 324, H02M 542, H02M 744
Patent
active
056298412
DESCRIPTION:
BRIEF SUMMARY
FIELD OF THE INVENTION
This invention relates to dc-dc converters of very low power which can be manufactured at low cost. The invention is particularly, but not exclusively, applicable to the power supply requirements of the Integrated Services Digital Network (ISDN) Standards.
DESCRIPTION OF THE PRIOR ART
ISDN Standards for a global information network are very stringent and demanding. One aspect is the provision of a dc-dc converter for use in terminal equipment (TE) and providing isolation between the TE and the subscriber bus (S bus). During normal mode operation the TE can have multiple power sources which include up to 1W from the S bus, with input voltage in the range 24-42 V. Under restricted power conditions, the designated TE must operate between 380 mW and 25 mW. More critical still is the requirement under the restricted condition that the line activity detection circuitry in the TE must continue to operate while maintaining a power consumption of less than 25 mW. Since the necessary functions in the restricted condition require a power of at least 13 mW, it is apparent that a minimum efficiency of 55% is required from the converter. If a greater efficiency can be achieved, the increase in power available for the TE will ease limitations on the internal TE circuitry; for example, an efficiency of 65% would make 16 mW available.
It is known that several manufacturers have approached the implementation of such systems in the form of ASICs utilising CMOS technology, but in general these do not allow a system fully complying with CCITT requirements to be achieved. Moreover, the component cost of the integrated circuit alone would be of the order of USD2.00, and the surrounding circuitry (such as switching FET, transformer, output secondary circuit and feedback isolation) would raise the unit cost to the order of USD5.00. Such an order of cost is unlikely to be commercially acceptable.
SUMMARY OF THE INVENTION
It is accordingly an object of the present invention to provide a dc-dc converter which is capable of meeting ISDN requirements at a low cost.
The invention accordingly provides a dc-dc converter comprising: transformer primary winding; means to operate repetitively; filter; regulate the output voltage; and parameter of the secondary side voltage;
BRIEF DESCRIPTION OF THE DRAWINGS
Embodiments of the invention will now be described, by way of example only, with reference to the accompanying drawings, in which:
FIG. 1 is a circuit diagram of one embodiment of the present invention;
FIGS. 2a and 2b illustrate waveforms in the operation of the circuit of FIG. 1; and
FIG. 3 is a circuit diagram of a modified embodiment.
DESCRIPTION OF THE PREFERRED EMBODIMENTS
Referring to FIG. 1, a dc-to-dc converter has an input 10a, 10b for receiving a dc input at 40 V nominal. The input voltage is switched by a power switch transistor Q5 across the primary winding 12 of a coupling transformer. A transformer secondary winding 14 supplies a regulated 5 V dc output at 16a, 16b via a rectifier diode 18 and a low pass filter in the form of capacitors 20a, 20b.
The power switch transistor Q5 may suitably be a low gate threshold mosfet type ZVNL120A by Zerex. This has adequate Id continuous and Id peak ratings together with a 200 V Vds rating. This device is available in E-line and SOT23 format and typically exhibits a maximum gate threshold of 1.5 V. The gate charge requirements at 2.7 Vgs are 0.25 nC. In such a low power, high efficiency system the switching frequency should be as low as possible to reduce core losses and switching losses. A suitable compromise is about 25 kHz to keep out of audio frequencies. The present embodiment operates at 26 kHz, but up to 40 kHz is feasible if dictated by other requirements. At 26 kHz, the gate charge requirement of 0.25 nC for Q5 translates into 17 .mu.W gate power requirement.
The power switch Q5 is controlled by an oscillator generally designated at 22 and comprising a CMOS integrated circuit 24 connected to operate as a ring-of-three oscillator. This form of
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International Search Report dated Jun. 15, 1994 corresponding to International Application No. PCT/GB94/00296.
Vu Bao Q.
Wong Peter S.
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