PCI to PCI bridge for transparently completing transactions betw

Details PCI to PCI bridge for transparently completing transactions betw PCI to PCI bridge for transparently completing transactions betw

1996-12-23

1999-06-29

Sheikh, Ayaz R.

395309, 395855, G06F 1328

Patent

active

059180269

ABSTRACT:
A PCI repeater coupled between a primary bus and a secondary bus includes logic to allow downstream and upstream bursting across the repeater. The PCI repeater echoes transactions in either an upstream or downstream direction, and does not need any additional address decode logic. The buses are coupled to an arbiter so that only one bus master has control of the bus. During a burst operation, the PCI repeater causes the arbiter to cease providing grant signals to prospective bus grantees. The signal is removed only after the transaction has completed on both sides of the PCI repeater to ensure that the PCI repeater is ready for a next transaction.

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