Method of making stacked DRAM capacitor structure by using a con

Details Method of making stacked DRAM capacitor structure by using a con Method of making stacked DRAM capacitor structure by using a con

1995-06-07

1997-05-13

Chaudhari, Chandra

Semiconductor device manufacturing: process

Making passive device

Stacked capacitor

H01L 218242

Patent

active

056292287

ABSTRACT:
A method of forming a microelectronic device is described comprising the steps of providing a substrate, forming a conductive region on the substrate, and forming an insulating layer on said conductive region and said substrate. The method further comprises the steps of forming a spacer layer on said insulating layer, removing selective portions of said spacer layer and said insulating layer to expose a selective area of said conductive region thereby forming a storage node contact window, and forming a first conductive layer on said spacer layer and within said storage node contact window wherein said first conductive layer is in electrical communication with said conductive region. A storage electrode is formed by removing selective portions of said first conductive layer, removing said spacer layer thereby exposing a bottom surface area of said first conductive layer, conformably depositing a second conductive layer encompassing and in electrical communication with said first conductive layer and overlying said insulating layer, and etching a portion of said second conductive layer thereby isolating said second conductive layer from surrounding circuit elements. The capacitor is completed by forming a dielectric layer over said storage electrode and forming a third conductive layer which acts as a plate electrode capacitively-coupled to said storage electrode through said dielectric layer. Other devices, systems and methods are also disclosed.

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"3-Dimensional Stacked Capacitor Cell for 16M and 64M DRAMS", Ema et al., International Electron Devices Meeting, Dec., 1988, pp. 592-595.
"Novel High Density, Stacked Capacitor MOS RAM", Koyanagi et al., International Electron Devices Meeting, Dec., 1978, pp. 348-351.

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