Intermediate frequency gain stage with rectifier

Telecommunications – Receiver or analog modulated signal frequency converter – Frequency modifying or conversion

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455341, H04B 126

Patent

active

058930280

ABSTRACT:
An intermediate frequency gain and rectifying stage for an IF system is implemented with a high swing folded-casecode structure terminated into a current-mirror load. The signal-path outputs are derived from the current-mirror loads, and the rectification and current-limiting RSSI functions are performed with two additional constant-current sources and two additional current-mirror loads. One load current from one leg or current path of the signal-path gain-stage is mirrored into a constant-current source and a second current-mirror structure. A second leg or current path of the signal-path gain-stage is likewise mirrored into yet another constant-current source and another current-mirror structure. When the input signal is not present, the load currents in the signal-path gain-stage are equal and the rectified output signal on an output node IOUT is constant or set to zero. With a differential input signal present, the load currents in the signal-path gain-stage produce a plus delta-current and minus delta-current. The plus delta-current, which represents a difference between the current in one of the legs of the signal-path gain-stage and the current of a corresponding constant current source, is mirrored to generate the RSSI current output signal at the IOUT node. Likewise, during the negative-half input-cycle the signal-path load currents are again mirrored and only the plus delta-load-current is rectified and output on the output node IOUT.

REFERENCES:
patent: 4926139 (1990-05-01), Anderson et al.
patent: 5448770 (1995-09-01), Hietala et al.
patent: 5564089 (1996-10-01), Barrett, Jr.

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