Pipeline processing method and device for instruction execution

Details Pipeline processing method and device for instruction execution Pipeline processing method and device for instruction execution

1997-02-25

1999-04-06

Coleman, Eric

39580001, G06F 938

Patent

active

058929657

ABSTRACT:
A second execution unit such as a coprocessor incorporated into a processor is connected such that the direction of its processing flow is opposite to that of the main pipeline processing flow, and executes high-speed multiplication operations and specific operations. Conventionally, the second execution unit has been provided in the same direction as a first execution unit. With this prior art arrangement, the second execution unit is initiated at an early stage of pipeline processing. With the arrangement of this invention, the second execution unit is initiated at a later stage, giving sufficient time before all the operation data are prepared. Thus, it is unnecessary for the apparatus to start subsequent processing until all operation data become available, thereby enhancing processing performance.

REFERENCES:
patent: 5187800 (1993-02-01), Sutherland
patent: 5572690 (1996-11-01), Molnar
patent: 5600848 (1997-02-01), Sproull
patent: 5704054 (1997-12-01), Bhattacharya
NEC Technology Report vol. 48, No. Mar. 1995, pp. 42-47.

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