Automatic layout for cascode voltage switch logic

Details Automatic layout for cascode voltage switch logic Automatic layout for cascode voltage switch logic

1985-05-24

1986-12-09

Hearn, Brian E.

Metal working

Method of mechanical manufacture

Assembling or joining

29569R, 29577C, H01L 2978, H01L 2178

Patent

active

046271520

ABSTRACT:
A method for automatically laying out a circuit starting from a logic gate diagram, especially for a CMOS technology. The logic is divided into blocks having a maximum number of serially connected transistors. Then the transistors are ordered to maximize the number of contiguously connected transistors. The ordered transistors then have their remaining connections determined according to the type of logic gate they represent.

REFERENCES:
patent: 4356504 (1982-10-01), Toyun
patent: 4412237 (1983-10-01), Matsumura
patent: 4513307 (1985-04-01), Brown

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