Boots – shoes – and leggings
Patent
1996-04-01
1999-04-06
Mai, Tan V.
Boots, shoes, and leggings
36473602, G06F 738
Patent
active
058926968
ABSTRACT:
A microprocessor by a pipeline control method with the process of a machine instruction divided into several stages for performing the parallel processing in each stage comprises a register file for holding the data necessary for the internal arithmetic processing and providing an arithmetic circuit with the data, a plurality of timing registers for temporally holding the parallel processed data in each stage, and a short pass circuit connected between the output of the arithmetic circuit as well as the timing registers of holding the operation result by the arithmetic circuit and the timing registers of holding the input data for the arithmetic circuit, the short pass circuit selecting operands the register file can't provide with at a time from the output of the arithmetic circuit or from the output of the timing register of holding the operation result by the arithmetic circuit and simultaneously providing the timing registers of holding the input data for the arithmetic circuit with the data of the operands.
REFERENCES:
patent: 4771379 (1988-09-01), Ando et al.
patent: 4852040 (1989-07-01), Oota
patent: 4945506 (1990-07-01), Baji
patent: 4949292 (1990-08-01), Hoshino et al.
Mai Tan V.
NEC Corporation
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