Fishing – trapping – and vermin destroying
Patent
1994-11-14
1995-12-05
Wilczewski, Mary
Fishing, trapping, and vermin destroying
437192, 437200, H01L 21336, H01L 2128
Patent
active
054728967
ABSTRACT:
A method of fabricating MOSFET device with polycide gate, which includes a polysilicon layer and a refractory metal silicide layer, is described. After a thin oxide layer is formed by a thermal process, the refractory metal silicide layer is transformed from an amorphous form to a crystalline form that leads to peeling and surface roughness problems in the prior art. This method utilizes an additional ion implantation step to transform the refractory metal silicide layer from the crystalline form back into the amorphous form. Hence, the problems of peeling and surface roughness of the polycide gate can be overcome.
REFERENCES:
patent: 4356623 (1982-11-01), Hunter
patent: 4683645 (1987-08-01), Naguib et al.
patent: 4777150 (1988-10-01), Deneuville et al.
patent: 4782033 (1988-11-01), Gierisch et al.
patent: 4788160 (1988-11-01), Havemann
patent: 4859278 (1989-08-01), Choi
patent: 4897368 (1990-01-01), Kobushi et al.
patent: 4935380 (1990-06-01), Okumura
patent: 5013686 (1991-05-01), Choi et al.
patent: 5028554 (1991-07-01), Kita
patent: 5089432 (1992-02-01), Yoo
patent: 5130266 (1992-07-01), Huang et al.
patent: 5234850 (1993-08-01), Liao
patent: 5340761 (1994-08-01), Loh et al.
patent: 5393685 (1995-02-01), Yoo et al.
Chen Anchor
Hong Gary
United Microelectronics Corp.
Wilczewski Mary
LandOfFree
Method for fabricating polycide gate MOSFET devices does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for fabricating polycide gate MOSFET devices, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for fabricating polycide gate MOSFET devices will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1373811