Excavating
Patent
1988-04-15
1989-08-01
Fleming, Michael R.
Excavating
371 57, H04Q 700
Patent
active
048539317
ABSTRACT:
A Violating All Zero Octet (VAZO) detector for a ZBTSI clear channel data transmission system is described, which is optimized for minimum logic gate count, minimum circuit complexity, minimum external control signals and minimum signal processing delay, in a VLSI hardware embodiment which is advantageously implemented in application specific integrated circuit (ASIC) technology. An array of logic NOR gates scans input data for zero strings of data that could combine with an all-zero octet to violate the zero string criterion enables a zero string search to be performed with a minimum of circuit complexity. The use of an input shift register to buffer input data for other portions of the associated ZBTSI encoder provides for a minimized number of gates in a VLSI implementation.
REFERENCES:
patent: 3156893 (1964-11-01), Harel
patent: 3405235 (1965-02-01), Carter
patent: 4502142 (1985-02-01), Csengory
patent: 4644546 (1987-02-01), Doi
Fleming Michael R.
Morris Jeffrey P.
Siemens Transmission Systems, Inc.
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