Boots – shoes – and leggings
Patent
1983-04-15
1989-08-01
Shaw, Gareth D.
Boots, shoes, and leggings
3649654, G06F 900
Patent
active
048538906
ABSTRACT:
In a vector processor including pipeline processors and means for synchronously controlling each component, there is provided an FIFO memory for temporarily storing the output of each pipeline processor and for outputting the stored data, in the order of storing, to at least one of the pipeline processors. Since intermediate result of operation is temporarily stored in the FIFO memory, a simple microprogram can be used and thus the capacity of the memory for microprogram can be reduced even if the successive intermediate results for calculation of vector elements are overlapped within the loop of the microprogram.
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Abe Shigeo
Bandoh Tadaaki
Hirasawa Kotaro
Ide Jushi
Hitachi , Ltd.
Mills John G.
Shaw Gareth D.
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