Process for making semiconductor-on-insulator device interconnec

Details Process for making semiconductor-on-insulator device interconnec Process for making semiconductor-on-insulator device interconnec

1989-07-13

1991-11-19

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 43, 437 51, 437913, 148DIG147, 148DIG19, H01L 21283

Patent

active

050666134

ABSTRACT:
A process for developing conductive interconnect regions between integrated circuit semiconductor devices formed on an insulating substrate utilizes the semiconductor material itself for formation of device interconnect regions.
A patterned layer of semiconductor material is formed directly on the surface of an insulating substrate. The patterned layer includes regions where semiconductor devices are to be formed and regions which are to be used to interconnect terminals of predetermined ones of the semiconductor devices. After forming the semiconductor devices in selected regions of the semiconductor material, the regions of the semiconductor material patterned for becoming interconnects are converted to a metallic compound of the semiconductor material.

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Reedy et al., "Thin (100 nm) SOS for Application to Beyond VLSI Microelecnics", Mat. Res. Soc. Symp. Proc., vol. 107, 1988.

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