Method of making semiconductor IC including polar transistors

Details Method of making semiconductor IC including polar transistors Method of making semiconductor IC including polar transistors

1989-01-10

1991-11-19

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 55, 437 56, 437 32, 437918, 148DIG9, 148DIG151, H01L 21331

Patent

active

050666029

ABSTRACT:
In a semiconductor IC, a vertical pnp or npn transistor of a uniform characteristic and a high breakdown voltage is made by forming, for example, a p.sup.- -collector region (39) in an n-type epitaxial region, an n-well base region (41) formed in the p.sup.- -collector region (39) and a p-emitter region (42) formed in the n-well base region (41); and furthermore, for example as shown in FIG. 9, p.sup.- -regions (40) and (49) are formed simultaneously with the p.sup.- -collector region (39) and an n-region (53) is formed simultaneously with the n-well base region (41), thereby constituting IIL of superior characteristics and a high resistance device at the same time as forming of the vertical transistor without substantial increase of manufacturing steps; and in the similar way, by combining the p.sup.- -region and n-region formed in the above-mentioned simultaneous steps with other region formed simultaneously with the forming of the vertical transistor, high h.sub.FE transistor, high speed vertical npn transistor, cross-over devices, p-channel and/or n-channel MOS transistors can be formed within limited manufacturing steps.

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patent: 4546539 (1985-10-01), Beasom
patent: 4826780 (1989-05-01), Takemoto et al.

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