Semiconductor device and manufacturing method of the same

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357 16, H01L 2980

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active

048050059

ABSTRACT:
A semiconductor device and method of manufacturing the same. The device comprises a first n-type semiconductor layer and a second undoped semiconductor layer between which a hetero-junction is formed, and a third p-type embedded semiconductor layer, a gate metal formed without the exposure to air immediately after the third, second and first semiconductor layer are successively formed, and an external electrode connected with the third p-type embedded semiconductor layer, capable of controlling the carriers in the neighborhood of the hetero-junction. This semiconductor device greatly improves the controllability of the threshold voltage thereof, and provides the gate electrodes of good quality.

REFERENCES:
patent: 4605945 (1986-08-01), Katayama et al.
Solomon, P. M. et al, "A GaAs Gate Heterojunction FET", IEEE Electron Device Letters, vol. EDL-5, No. 9, Sep. 1984, pp. 379-381.

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