Semiconductor device with a planar junction and self-passivating

Details Semiconductor device with a planar junction and self-passivating Semiconductor device with a planar junction and self-passivating

1986-12-11

1989-02-14

James, Andrew J.

357 52, 357 34, H01L 2936, H01L 2970

Patent

active

048050040

ABSTRACT:
A semiconductor device with a planar junction and self-passivating termination includes: a silicon substrate of one type of conductivity; an epitaxial layer of a second type of conductivity which is opposite to the first type of conductivity, lying on the substrate, so as to form with it a planar PN junction; a first region, of the first type of conductivity, that delimits, in its interior, an active portion of the device and extends transversely, from the surface of the epitaxial layer to the substrate with a portion having a high concentration of impurities and, on the surface, in the epitaxial layer, with a portion having a low concentration of impurities; and another region immersed in the epitaxial layer and of the same type of conductivity, but with a higher concentration of impurities. The latter region and the top portion of the first region extend toward each other with progressively decreasing concentrations of impurities. The first region may consist of a thin surface zone diffused on the walls and on the bottom of a deep groove of the type normally made in mesa devices. However, unlike mesa devices of the prior art the device according to the present invention does not require a thick layer of dielectric material in contact with the junction and its electrical properties are therefore improved and more reliable.

REFERENCES:
patent: 4035824 (1977-02-01), Suzuki
patent: 4165516 (1979-08-01), Smulders
patent: 4602266 (1986-07-01), Coe
patent: 4605948 (1986-08-01), Martinelli

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