Analog-to-digital converter circuit

Coded data generation or conversion – Converter compensation

Patent

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Details

341155, H03M 106, H03M 112

Patent

active

051462230

ABSTRACT:
The offset from the ideal value for the bias voltage to be added to the input signal to the A/D converter and the offset from the ideal value of the average voltage in the analog signal are detected. The detected offset is substracted from the output data of the A/D converter. Alternately, the bias voltage may be changed by the detected offset so that the average voltage of the input signal to the A/D converter is equal to the ideal value.

REFERENCES:
patent: 4228423 (1980-10-01), Schwerdt
patent: 4229703 (1980-10-01), Bustin
patent: 4251803 (1981-02-01), Debord et al.
patent: 4380005 (1983-04-01), Debord et al.
patent: 4498072 (1985-02-01), Moriyama
patent: 4590458 (1986-05-01), Evans et al.
patent: 4766417 (1988-08-01), Takayama et al.
patent: 4771267 (1988-09-01), Russel, Jr. et al.

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