Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1995-06-07

1999-06-29

Fears, Terrell W.

Static information storage and retrieval

Format or disposition of elements

365182, 36518901, 365206, G11C 1300

Patent

active

RE0362360

ABSTRACT:
A semiconductor memory device is disclosed which comprises a regular row/column memory cell array having blocks obtained by dividing the memory cell array in the column and row directions, the blocks each being further divided in the column direction to form a plurality of sections, blocks divided in the column direction, a second peripheral circuit provided between the blocks divided in the row direction and including a first decoder, a third peripheral circuit provided between the first peripheral circuit and the respective block and including a second portion of the memory cell array and including bonding pads and input protection circuit.!. sense amplifiers provided between neighboring sections in each of the blocks.

REFERENCES:
patent: 4660174 (1987-04-01), Takamae
patent: 4736271 (1988-04-01), Mack et al.
patent: 5504704 (1996-04-01), Sato et al.
Syuso Fujii et al., "A 45ns 16Mb DRAM with Triple-Well Structure"; 1989 IEEE International Solid-State Circuits Conference; pp. 248-249 and 354.
Tomio Nakano et al., "A Sub-100 ns 256K DRAM With Open Bit Line Scheme"; IEEE J. Solid-State Circuits, pp. 452-456; vol. SC-18, No. 5 (1983).

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