Boots – shoes – and leggings
Patent
1992-02-27
1995-12-12
Treat, William M.
Boots, shoes, and leggings
3649474, 36496431, 364DIG2, G06F 1500
Patent
active
054756316
ABSTRACT:
Presented is an integrated circuit chip including a random access memory (RAM) array, serial access memory (SAM), an arithmetic logic unit, a bidirectional shift register, and masking circuitry. The arithmetic logic unit, SAM, shift register, and masking circuitry are all as wide as one side of the RAM array, and are all communicable with each other via data transfer means. This allows wide word processing, user configurable for parallel processing. Bits masked by the masking circuitry are selectable by data in the bidirectional shift register, providing shiftable masking means. Random access and serial access are done through separate ports. The bidirectional shift register is optionally serially accessible. Methods of use are also presented.
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Parkinson Ward D.
Seyyedy Mirmajid
Waller William K.
Collier Susan B.
Micro)n Technology, Inc.
Treat William M.
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