Pixel block transfer with transparency

Details Pixel block transfer with transparency Pixel block transfer with transparency

1994-03-08

1996-02-20

Powell, Mark R.

395166, G06F 1200

Patent

active

054936462

ABSTRACT:
A data processor with a transparency detection data transfer controller transfers data from a block of source addresses to a block of destination addresses. A transparency register stores transparency data. A comparator compares the recalled data to the stored transparency data and indicates whether the data to be transferred is to be written to the memory. The recalled data to be transferred is not to be written into the memory if it matches the transparency data. The transparency register may store a multiple of a multibit minimum amount of data to be transferred. The data to be transferred has a selected size which is an integral multiple of a minimum amount of data to be transferred. The comparator includes plural data comparators corresponding to each multibit minimum amount of data to be transferred. A multiplexer receives comparison signals and an indication of the selected data size and provides a number of indications of whether the data to be transferred is to be written to equal memory equal to the number of times the data words of the selected size fit within the transparency register. In the preferred embodiment the selected data size may be 8, 16, 32 or 64 bits and the transparency register stores 64 bits.

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