Phase synchronization circuit having a short pull-in time and a

Details Phase synchronization circuit having a short pull-in time and a Phase synchronization circuit having a short pull-in time and a

1994-10-04

1995-12-12

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

327148, 331 17, H03K 513, H03K 500

Patent

active

054753260

ABSTRACT:
In a phase synchronization circuit including a digital phase comparator, a synchronism discrimination circuit, a charge pump circuit, a loop filter, a voltage controlled oscillator, and a frequency-division circuit, the charge pump circuit comprises a level comparator comparing the output voltage of the loop filter with a predetermined reference voltage, for outputting a level discrimination signal, a first AND circuit for outputting a logical product of an output UP of the phase comparator and the level discrimination signal, an inverter for outputting an inverted signal of an output DOWN of the phase comparator, and a second AND circuit for outputting a logical product of an output signal of the inverter and the level discrimination signal. A PMOS transistor is connected at its source to a voltage supply through a constant current source, and has its gate applied with an output signal of the AND circuit, and its drain connected to an input of the loop filter, and an NMOS transistor is connected at its drain to the input of the loop filter and has its gate applied with an output signal of the AND circuit and its source connected to ground through a constant current source.

REFERENCES:
patent: 5081427 (1992-01-01), Suarez
patent: 5105160 (1992-04-01), Summers
patent: 5144156 (1992-09-01), Kawasaki
patent: 5170130 (1992-12-01), Ichahara

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