Method of forming heterostructure field effect transistor

Details Method of forming heterostructure field effect transistor Method of forming heterostructure field effect transistor

1991-10-05

1993-03-23

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437107, 437132, 437176, 437203, 437912, H01L 21265

Patent

active

051963590

ABSTRACT:
A heterostructure field effect transistor having a buffer layer comprising a first compound semiconductor material. A layer of second semiconductor material different from the first material is formed over the buffer layer. The second layer has a total thickness less than 250 .ANG.. A doped third semiconductor layer formed over the second layer. The net has a dopant concentration in the second layer is greater than the net dopant concentration in the third layer. A gate layer is positioned over the third layer. In a preferred embodiment the second layer is a pulse-doped pseudomorphic material.
There is also provided a method for making the heterostructure field effect transistor. A doped pseudomorphic semiconductor layer of a first conductivity type is formed between first and second other semiconductor layers, the second layer including a net dopant concentration of the first conductivity type. A Schottky gate electrode is formed in contact with the second layer.

REFERENCES:
patent: 4830980 (1989-05-01), Hsieh
patent: 4908325 (1990-03-01), Berenz
patent: 5118637 (1992-06-01), Ishikawa
Judaprawira et al., "Modulation-doped MBE GaAs
-Al.sub.x Ga.sub.1-x As MESFETs", IEEE Elec. Dev. Lett. vol. EDL-2, No. 1, Jan. 1981, pp. 14-15.

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