Fishing – trapping – and vermin destroying
Patent
1991-05-02
1993-05-11
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 30, 437 44, 437978, H01L 21266
Patent
active
052100448
ABSTRACT:
A method of manufacturing a floating gate type nonvolatile memory cell having an offset region, wherein the length of the offset region is defined by the portion of the substrate covered by the injection blocking film formed on the side wall of the floating gate electrode. Thus, the offset region is self-aligned with respect to the side wall of the floating gate electrode. Moreover, since the insulating film formed on the floating gate electrode includes a nitride film, it is damaged little while the injection blocking film is being formed on or removed from the side wall of the floating gate electrode. In addition, when an oxide film is formed on the offset region, substantially no additional oxide film is formed on the nitride film in the insulating film on the floating gate electrode, and the thickness of the insulating film does not change.
REFERENCES:
patent: 4622656 (1986-11-01), Kamiya et al.
patent: 4786609 (1988-11-01), Chen
patent: 4794565 (1988-12-01), Wu et al.
patent: 4814286 (1989-03-01), Tam
patent: 4852062 (1989-07-01), Baker et al.
Chaudhari C.
Hearn Brian E.
Kabushiki Kaisha Toshiba
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