Single-polysilicon dram device and process

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

357 42, 357 59, 357 67, H01L 2978, H01L 2702, H01L 2904, H01L 2348

Patent

active

048946931

ABSTRACT:
A new DRAM structure, wherein the top plate of the storage capacitor is provided by a TiN thin film layer 410', and the bottom plate is provided by a polysilicon layer 402' which also provides the gates 402 of the pass transistors.

REFERENCES:
patent: 4178605 (1979-12-01), Hsu et al.
patent: 4240092 (1980-12-01), Kuo
patent: 4460911 (1984-07-01), Salters
patent: 4475118 (1984-10-01), Klein et al.
patent: 4502209 (1985-03-01), Eizenberg et al.
patent: 4536947 (1985-08-01), Bohr et al.
patent: 4593454 (1986-06-01), Baudrant et al.
patent: 4605947 (1986-08-01), Price et al.
patent: 4649406 (1987-03-01), Takemae et al.
Ting, J. Vac. Sci. Technol., 21 (1), May/Jun. 1982, pp. 14-18.
M. Wittmer et al., "Applications of TiN Thin Films in Silicon Device Technology," Materials Research Society Symposium, Nov. 1984, pp. 397-405.
Kaneko et al., "Novel Submicron MOS Devices by Self-Aligned Nitridation of Silicide", Technical Digest of IEDM, (IEEE, Dec. 1, 1985), pp. 208-211.
Chen et al., "A New Device Interconnect. Scheme for Sub-Micron VLSI", Technical Digest of IEDM, (IEEE, 1984), pp. 118-121.
Alperin et al., "Development of the Self-Aligned Titanium Silicide Process for VLSI Applications," J. Solid-State Circuits, (IEEE, Feb. 1985), pp. 61-69.
Tsang, "Forming Thick Metal Silicide for Contact Barrier," IBM Technical Disclosure Bulletin vol. 19, No. 9, Feb. 1977, pp. 3383-3385.
Rideout, "Method of Fabricating MOSFET Integrated Circuits with Low Resistivity Interconnection Lines," IBM Technical Disclosure Bull., vol. 23, No. 6, Nov. 1980, pp. 2563-2566.
De La Moneda, "Self-Aligned Silicide Buried Contacts", IBM Technical Disclosure Bulletin, vol. 24, No. 7A, Dec. 1981, pp. 3454-3457.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Single-polysilicon dram device and process does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Single-polysilicon dram device and process, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Single-polysilicon dram device and process will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-1338109

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.