Patent
1988-03-25
1990-01-16
James, Andrew J.
357 237, 357 45, 357 71, H01L 2710, H01L 2944
Patent
active
048946907
ABSTRACT:
A thin film transistor array includes a gate bus and a source bus intersecting with each other at right angles, a thin film transistor pair disposed adjacent to the intersecting point and electrically connected to the two buses. If a short circuit is detected between the two buses, the gate bus or the source bus is severed into a separate portions to eliminate the short circuit. A bypass bus is provided to electrically connect the electrically good severed portions and to the end terminal. Such a bypass bus avoids the need for additional power supply terminals to the opposite ends of the severed bus and facilitates driving the thin film transistor by supplying the power at only one end thereof.
REFERENCES:
patent: 4673969 (1987-06-01), Ariizumi et al.
patent: 4689116 (1987-08-01), Coissard et al.
Hebiguchi Hiroyuki
Kasama Yasuhiko
Matsuda Hideyuki
Okabe Kazuya
Alps Electric Co. ,Ltd.
Jackson, Jr. Jerome
James Andrew J.
Malaska Stephen L.
Shoup Guy W.
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