Method of generating the sticky-bit from the input operands

Details Method of generating the sticky-bit from the input operands Method of generating the sticky-bit from the input operands

1997-06-25

2000-03-28

Mai, Tan V.

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

G06F 738

Patent

active

06044391&

ABSTRACT:
A method for generating the sticky-bit includes encoding the first operand to represent the number of trailing zeros in the first operand. Then the second operand is encoded to represent the number of trailing zeros in the second operand. The encoded values are then added together to form a sum representing the number of trailing zeros in the multiplication result. The sum total number of trailing zeros is then compared to a predetermined constant. The constant is equal to the number of bits used in determining the sticky-bit. If the sum is larger than the constant, then the sticky-bit is given a value of zero and, conversely, if the sum is smaller than the constant, the sticky-bit is given a value of one.

REFERENCES:
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Brent, Richard P. and Kung, H. T., "A Regular Layout for Parallel Adders" IEEE Transactions On Computers vol. C-31:260-264 (1982).
Santoro, Mark R. et al., "Rounding Algorithms for IEEE Multipliers" 176-183 Proceedings of the 9th Symposium on Computer Arithmetic (1989).
Yu, Robert K. and Zyner, Gregory B., "167 MHz Radix-4 Floating Point Multiplier" Proceedings of the 12th Symposium on Computer Arithmetic (1995).
"IEEE Standard for Binary Floating-Point Arithmetic", ANSI/IEEE Std 754-1985, New York, The Institute of Electrical and Electronic Engineers, Inc., (1985).
UltraSPARC.TM. Programmer Reference Manual, Rev. 1.0, Sun Microsystems, Inc., p. 237 (1995).

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