Data processing system register control

Details Data processing system register control Data processing system register control

1996-10-08

1999-03-09

Eng, David Y.

G06F 930

Patent

active

058812571

ABSTRACT:
A data processing system having a plurality of registers 10 and an arithmetic logic unit 20, 22, 24 is responsive to program instruction words. At least one program instruction word includes a destination register bit field <dest> specifying a destination register of a result data word and a destination register write disable flag for disabling writing of that result data word to the destination register.

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