Multipurpose error correction calculation circuit

Details Multipurpose error correction calculation circuit Multipurpose error correction calculation circuit

1994-09-16

1996-09-10

Envall, Jr., Roy N.

Boots, shoes, and leggings

364761, 371 371, G06F 700, G06F 1500, G06F 752, H03M 1300

Patent

active

055555160

ABSTRACT:
A bit-oriented error correction calculation circuit performs numerous mathematical operations including bit-oriented convolutions, inversions, multiplications, additions, and bi-directional basis conversions. The circuit includes three banks of registers (400,401,402) connected as a convolution circuit to produce a sequence of inner products with respect to the first bank of registers (400) and the second bank of registers (401). Each of the banks of registers (400,401) has a bank loading switch (440,441,442) connected to a serial input terminal thereof for loading a selected one of a plurality of serial multibit values into the banks, including selective gating of feedback signals from respective feedback circuits (450,452) in registers (400,402) and (inter alia) constant values. The values of the feedback multipliers are selectively changeable in accordance with a field length of the value involved in error correction of data. Further included are a summation circuit (320); a comparison circuit (360); and a bi-directional conversion unit for converting an m-bit input value from an input basis representation to an output basis representation.

REFERENCES:
patent: 5218691 (1993-06-01), Tuma et al.
patent: 5235857 (1993-08-01), Anderson
patent: 5291584 (1994-03-01), Challa et al.
patent: 5297148 (1994-03-01), Harari et al.
patent: 5323402 (1994-07-01), Vaccaro et al.

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