Phase locked loop using a schmitt trigger block

Details Phase locked loop using a schmitt trigger block Phase locked loop using a schmitt trigger block

1998-05-28

2000-03-28

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

327156, 331 1A, 331 17, H03L 706

Patent

active

060436956

ABSTRACT:
A phase locked loop (PLL) circuit is described which uses a Schmitt trigger block (28) to achieve a very small steady state phase error at an input of a phase comparator block (21) over the entire PLL lock voltage range. The amount of hysteresis which each Schmitt trigger circuit (281, 282) in the Schmitt trigger block (28) has depends on the damping factor .zeta. of the PLL circuit as well as the temperature and voltage coefficients of a VCO's input voltage. The midpoint of the positive and the negative thresholds of the hysteresis curve of each Schmitt trigger circuit (281, 282) is set by the current voltage characteristics of charge pump circuits in a charge pump block (22). Responsive to the PLL's lock voltage (VCNT), the Schmitt trigger block (28) commands a control logic circuit (29) to turn ON or turn OFF as the case may be PMOS pump UP transistors to that of NMOS pump DOWN transistors. It is this ratio which determines the PLL's steady state phase error. In one embodiment, a frequency divider (25) is used between the VCO (24) and the phase comparator block (21). In another embodiment, this divider (25) is removed and the output of the VCO is fed directly back to the phase comparator block.

REFERENCES:
patent: 4555679 (1985-11-01), Katsuyama
patent: 5274338 (1993-12-01), Rieger et al.
patent: 5372046 (1994-12-01), Kleven et al.
patent: 5576647 (1996-11-01), Sutardja et al.

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