Combined add/shift structure

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Details

36471508, G06F 750

Patent

active

059264071

ABSTRACT:
The problems identified above are in large part addressed by a combined add/shift circuit. In one embodiment, first and second operands are received by a first stage that produces single-bit propagate and generate information in response to the operands and a mode signal. The single-bit propagate and generate information is then processed with a carry bit by one or more intermediate stages that form final carry information as dictated by a shift control circuit. The carry information is then supplied to a final stage together with an XOR of the input operands. The final stage generates the result bits in response to the final carry information and the XOR of the input operands. The use of propagate and generate information reduces the time delay required by the adder circuit while the use of the control circuitry enables the adder circuit to function as a barrel shifter. In the add mode, the final carry information produced contains enough information about the first and second operands such that the sum of the first and second operands can be directly produced from the final carry information and the XOR of the input operands. In the shift mode, the final carry information is indicative of the shifted first operand.

REFERENCES:
patent: 4504924 (1985-03-01), Cook et al.
patent: 4623981 (1986-11-01), Wolrich et al.
patent: 4882698 (1989-11-01), Young
patent: 5436574 (1995-07-01), Veenstra

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