Television – Synchronization – Locking of video or audio to reference timebase
Patent
1997-07-28
1999-07-20
Flynn, Nathan
Television
Synchronization
Locking of video or audio to reference timebase
348 10, H04N 700
Patent
active
059262273
ABSTRACT:
A video decoder which uses a dynamic memory allocation scheme having a synchronization counter for decoder-display synchronization. The synchronization counter advantageously allows for graceful recovery from error conditions in which the decoding portion of the video decoder falls behind the display portion of the video decoder. In one embodiment, the video decoder includes an MPEG bitstream decoder, FIFO buffer logic, a free segment register, and a display processor. The video decoder decodes an encoded bitstream to obtain image data for storage in an external memory, and the display processor retrieves the image data for display on a monitor. To conserve memory, the bitstream decoder stores only anchor frames as complete images in the external memory, and bi-directional images are stored in dynamically allocated memory segments. Free memory segments are determined by examination of a free segment register, and pointers to the memory segments having image data are passed to the display processor via the FIFO buffers. A synchronization counter tracks the number of memory segments by which the bitstream decoder is ahead of the display processor. By monitoring the contents of the synchronization counter and using this information to determine whether to place pointers to memory segments in the FIFO buffer, the bitstream decoder is able to maintain synchronization with the display processor, so that when the bitstream decoder catches up, the image data will be displayed at the correct position by the display processor.
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Neuman Darren
Schoner Brian
Flynn Nathan
Kivlin B. Noel
Le Uyen
LSI Logic Corporation
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