Clock pulse generator with selective pulse delay and pulse width

Details Clock pulse generator with selective pulse delay and pulse width Clock pulse generator with selective pulse delay and pulse width

1977-12-19

1979-08-21

Heyman, John S.

Registers

Coded record sensors

Particular sensor structure

328 55, 328 58, 328 63, 235 92DE, H03K 118

Patent

active

041654900

ABSTRACT:
Clock generating apparatus for a computer system has selective pulse delay and pulse width control. Selection of pulse delay and pulse width is accomplished by loading registers with predetermined data patterns. The registers can be loaded under program control or by data entry units, such as a keyboard, switches, etc. The registers are located in coarse and fine pulse delay and pulse width adjustment units. These units have the same physical structure, but are functionally definable by a settable control element. A dither delay element is included in these coarse and fine adjustment units, and it is selectable to provide a small increment of delay. The coarse pulse delay and pulse width adjustment units also include pulse mode control circuitry to control operation in either normal oscillator mode or in single cycle mode.

REFERENCES:
patent: 3440546 (1969-04-01), Nelson
patent: 3805167 (1974-04-01), Nash et al.
patent: 3883867 (1975-05-01), Hatano et al.
patent: 3959730 (1976-05-01), Weber et al.
patent: 3986126 (1976-10-01), Gindi et al.
patent: 4011517 (1977-03-01), Pommerening et al.
patent: 4101761 (1978-07-01), Merryman

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