Method of evaluating and thermally processing semiconductor wafe

Semiconductor device manufacturing: process – Including control responsive to sensed condition

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H01L 2100

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059856785

ABSTRACT:
In a method of evaluating a semiconductor wafer to provide an index as to whether slip generation is likely or not, the in-plane temperature distribution of the wafer is varied at a prescribed temperature and the condition of the temperature distribution at which slip line generation occurs is detected. The temperature distribution is varied using plural concentric heaters and is measured using a radiation thermometer. The temperature distribution is correlated to thermal stress in the wafer. In this manner, a range of tolerable thermal stress is specified, at which a slip line will not be generated.

REFERENCES:
patent: 5390228 (1995-02-01), Niibe et al.
patent: 5436172 (1995-07-01), Moslehi
patent: 5497381 (1996-03-01), O'Donoghue et al.
Mokuya et al. "Characteristics of the transient wafer temperature distribution in a furnace for semiconductor fabrication process" Electronics and Communications in Japan (Part 2) Dec. 1987. vol. 70. No. 12. pp. 59-65.

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