Fishing – trapping – and vermin destroying
Patent
1989-08-21
1991-07-16
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 36, 437 38, 437177, 437 40, 437912, 437944, 437 39, 437228, 437194, H01L 21338
Patent
active
050325418
ABSTRACT:
A method of producing a semiconductor device includes etching a recessed aperture in a substrate, forming a gate electrode in the aperture, burying the gate electrode with resist, etching the resist to expose the gate electrode, depositing a high conductivity metal on the gate electrode, and forming ohmic electrodes on opposite sides of the gate electrode by a series of processing steps.
REFERENCES:
patent: 4551905 (1985-11-01), Chao et al.
patent: 4923827 (1990-05-01), Calviello et al.
Ghandhi, S. K., VLSL Fabrication Principles, John Wiley & Sons, 1983, pp. 598-605.
Tampo et al., "Low Noise GaAs . . . for MMIC", Institute of Japanese Electronics . . . Engineers, Electron Devices (1987) pp. 7-11.
Kato et al., "Two-Layer Resist . . . GaAs Device", IEEE Transactions on Electron Devices, vol. ED-34, No. 4, Apr. 1987, pp. 753-758.
Hayashi Kazuo
Sakamoto Shin'ichi
Sonoda Takuji
Hearn Brian E.
Mitsubishi Denki & Kabushiki Kaisha
Quach T. N.
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