Programmed device controller

Details Programmed device controller Programmed device controller

1976-05-21

1978-02-21

Zache, Raulfe B.

Boots, shoes, and leggings

G05B 1101, G06F 900

Patent

active

040757072

ABSTRACT:
A processing system adapted to control a sequential automated device to a state determined by the immediately preceding state. The system comprises a read only memory (ROM) (or alternatively a static RAM) having coded at each address in bit positions 2 through n the address of either the output signal to be controlled, the input signal to be sensed or the next ROM address. Bit position 0 indicates whether an output or input is to be selected and bit position 1 either determines the desired state of the input that is selected or routes the 2 through n bit position address to select the output or to set a new address for the ROM. Accordingly bits 0 and 1 from the ROM are combined with the selected input in a logical circuit comprising gates and inverters to either increment the ROM address buffer or jump to a new address.

REFERENCES:
patent: 3849765 (1974-11-01), Hamano
patent: 3944987 (1976-03-01), Koyanagi et al.
patent: 3996565 (1976-12-01), Nakao et al.

Affiliated with

Also associated with

Rating

Programmed device controller does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Programmed device controller, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Programmed device controller will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-131310